Field of the Invention
The invention relates to a process for forming a structured photoresist layer on a semiconductor substrate, and a photoresist for use in such a process.
Integrated circuits on semiconductor substrates are generally produced with the aid of the planar technique. In the planar technique, local processing of semiconductor wafers is carried out by using lithographic methods. In the photolithographic methods, a thin radiation-sensitive film, a so-called photoresist layer, is first deposited on the semiconductor wafer. The photoresist layer is exposed to light through a suitable mask that contains the structure to be formed in the semiconductor substrate. Alternatively, however, X-rays may also be used for producing the structures on the photoresist layer. Furthermore, it is also possible to form the desired structures directly on the photoresist with the aid of an electron beam.
After the structures have been produced on the photoresist layer, the resist is developed and then cured. The structure so produced in the photoresist layer is then transferred with the aid of special etching methods into the semiconductor layer underneath. However, the photoresist layer itself can also serve for local masking of the semiconductor layer, for example, for an ion implantation.
Photolithography can be divided into a positive and a negative resist technique. In the positive resist technique, the photoresist becomes detached in the exposed parts on development of the resist, whereas the unexposed parts remain masked. In the negative resist technique, the situation is exactly the opposite. The exposed parts remain masked after development of the resist, whereas the unexposed parts dissolve during the development.
The increasing miniaturization of the integrated circuits necessitates the formation of increasingly small structure widths in the photoresist layer in the photolithography technique. The use of the structured photoresist layer as an etching mask for structuring the semiconductor layer underneath simultaneously requires a predetermined minimum layer thickness to ensure that the photoresist layer withstands the etching. As a result, with increasingly small component widths, the aspect ratio of the photoresist structures, i.e., the ratio of width to height of the individual structures, is becoming increasingly unfavorable. This increases the danger that the resist structures will collapse during the subsequent process step, which can then lead to incorrect structures on transfer of the resist structures to the semiconductor layer and, hence, to incorrect integrated circuits.
To prevent a collapse of the resist structures, good resist adhesion on the semiconductor surface is, therefore, necessary. To improve the adhesion of the photoresist on the semiconductor surface, surface wetting with a so-called primer, in the case of silicon wafers usually hexamethyldisilazane (HMDS), is generally carried out before application of the resist. The wetting of the silicon wafer with HMDS produces an organic surface that ensures a large contact angle with the customarily likewise organic photoresist layer and, hence, provides a large contact area. As an alternative to the use of HMDS as a primer, an organic antireflection layer that, similarly to the HMDS layer, produces an organic surface on the silicon wafer and additionally ensures a reduction in reflection on exposure of the photoresist layer is also used between the photoresist layer and the semiconductor substrate. In spite of the use of such primers, however, there is still the danger of a collapse of the photoresist structures, in particular, in the case of structure widths in the sub-μm range.